VLSI Design and Test Symposium organized by the VLSI Society of India
Please visit Related Info
for details on VDAT
and VLSI Faculty
Goals of VDAT Symposium
The idea behind VDAT
or the VLSI Design And Test Symposium
is to promote Research and Development on all aspects of VLSI in India. This symposium is a forum for free discussion on hot and emerging topics on VLSI and the related for VLSI professionals from India and abroad.
VDAT began in 1998 as a workshop with about 30 participants at Chennai. With the participation growing steadily each year, from the year 2005, VDAT has acquired the status of a Symposium. The VLSI Industry in India and academic community working in the area of VLSI have provided immense support to the symposium. The symposium is conducted during JUly each year, with participation from accross the world.
VDAT is organized by the VLSI Society of India
, with support and sponsorship from leading institues and the industy. Technical papers
Original and unpublished works are invited which undergo a blind review process by the peers in the field. Authors of accepted papers will be required to submit full papers and presentation foils. Final submissions are made available as proceedings of the symposium in both CD and hardcopy format. For a list of previous VDAT proceedings available, visit VSI publications. Tutorials
The first day of the symposium is devoted to Tutorials conducted by experts in the field. Three separate tutorials on diverse topics run concurrently, which can be attended separately. VLSI Education Day
The second day of the symposium is observed as VLSI Education Day
with an intention to bring together VLSI professionals in academia and the industry. VLSI Education Day includes:
Keynote speeches from eminent personalities
Panel discussion on topics related to VLSI Education in India
Invited talks from VLSI Professionals
Short paper presentations from Indian Colleges
The subsequent days of the event are devoted to presentations of the accepted technical papers, keynote speeches and panel discussions. From the year 2006, VDAT has introduced the Research Scholars' Forum.
Researh scholars can submit their Ph.D. theses which are briefly reviewed by the committee. The overview of selected theses can be presented by the authors during the session attended by the Experts to provide feedback. Fellowship
Fellowships are made available to teachers, students and research scholars from educational institutions to attend VDAT. Applicants should submit the Felowship form before the set date. The selected list by the Fellowship committee will be displayed on our website, besides being intimated by mail. Fellows must first register with the fellow category tariff under registration details. In the event of non-selection, the balance amount should be sent to attend the event. Details under fellowship. Registration
Any one interested in the field of VLSI can register and attend the event. At least one author of each selected paper must register and present the paper. Please refer Registration details.
VDAT Event History
||VDAT began as a small workshop in the year 1998. In 2005, it acquired the status of a Symposium.
The proceedings of VDAT are published in both hard and softcopy format. Visit VSI Publications for details on proceedings and Photo Gallery for images of past VDAT and VSI events.
More details on past VDAT Workshops and Symposium.
|1st VDAT Workshops
||Jan 7, 1998
|2nd VDAT Workshops
||Habitat World, New Delhi
||Aug 6-7, 1998
|3rd VDAT Workshops
||Aug 20-21, 1999
|4th VDAT Workshops
||Aug 25-27, 2000
|5th VDAT Workshops
||Aug 16-18, 2001
|6th VDAT Workshops
||Aug 29-31, 2002
|7th VDAT Workshops
||Aug 28-30, 2003
|8th VDAT Workshops
||Infosys Leadership Institute, Mysore;
||Aug 26-28, 2004
|9th VDAT Symposium
||Wipro Learning Center, Bangalore
||Aug 10-13, 2005
|10th VDAT Symposium
||International Centre, Goa
||Aug 9-12, 2006
|11th VDAT Symposium
||Saha Inst of Nuclear Physics, Kolkata
||Aug 8-11, 2007
|12th VDAT Symposium
||Wipro Campus, Bangalore
||July 23-26, 2008
|13th VDAT Symposium
||Wipro Campus, Bangalore
||July 8-10, 2009
|14th VDAT Symposium
||Chitkara University, Himachal Pradesh
||July 7-9, 2010
VDAT Mailing Group
A mailing group is setup at http://groups.yahoo.com/group/vdat
to provide information about the VLSI Design and Test Symposium held in India every August. In addition, information about other similar events taking place in India or abroad is also disseminated through this mailing list.
You may use firstname.lastname@example.org to publicize events related to VLSI Design/EDA/Test that take place in and around India. You can also use this address to discuss/debate issues related to VLSI in India. The list owner of the VDAT mailing group may be contacted at: email@example.com.
To subscribe, you may send a mail to firstname.lastname@example.org
To unsubscribe, send a mail to email@example.com
You will receive a confirmation mail, to be acknowledged within a week to subscribe/ unsubscribe.
Become a VDAT Mailing Group member to keep yourselves updated on forthcoming events.
This is meant only for Indian faculty in the area of VLSI/semiconductors/microelectronics. Anyone who wishes to subscribe must send a note from their official e-mail ID with details such as: Name, Designation
Or visit the site and click Join This Group Feedback:
Please use the feedback form
for your queries.
VLSI Related sites
International Conference on VLSI Design and Embedded Systems
Though all efforts have been made to ensure the accuracy and currency of the content on this Portal, the VLSI Design and Test (VDAT) Symposium Program Committee and the associated web-masters accept no responsibility in relation to the accuracy, completeness, usefulness or otherwise, of the contents. Users are advised to verify/check any information with the relevant source(s), and to obtain any appropriate professional advice before acting on the information provided in the website. In no event will the VDAT Symposium Program Committee and/or the associate web-master be liable for any expense, loss or damage including, without limitation, indirect or consequential loss or damage, or any expense, loss or damage whatsoever arising from use, or loss of use, of data, arising out of or in connection with the use of this Portal.
At many places on this website, you shall find links to other websites/portals placed for your convenience. We are not responsible for the contents and reliability of the linked websites and do not necessarily endorse the views expressed in them. Mere presence of the link or its listing on this Portal should not be assumed as endorsement of any kind. We can not guarantee that these links will work all the time and we have no control over availability of linked pages.
We do not object to you linking directly to the information that is hosted on this website with no prior permission, but would like you to inform us about links provided to this website, to keep you informed on changes or updates. Also, we do not permit our pages to be loaded into frames on your site. This website must load into a newly opened browser Window of the user.
Guidelines to authors
The submissions should represent original contribution and should not have been submitted to other forums.
It is important that abstracts bring out the contribution and novelty of the paper.
Students must note that reusing material from published work is incorrect and amounts to violation of copyright.
Survey papers are not acceptable.
Submitting authors must become members of the VDAT mailing list
, where updates are sent.
Authors must upload their submissions at the specified website, and must not send it through mail.
Submissions will undergo blind review – the authors must not include their names or affiliations.
All the submitting authors are notified on the status of acceptance via mail, and the reviews are displayed on the relevant website, to aid the authors of accepted papers to improvize final submission.
The accepted papers are published in the hardcopy of proceedings, and also distributed as softcopy along with their slides. The papers are categorized as Full papers/Embedded Tutorials
and Short Papers
. Full papers get 10 pages in the hardcopy and Short papers 8 pages. As the paper size of the VDAT proceedings are smaller than letter size
, follow the guidelines to format page layout.
The set page limit for both category includes figures, text, references etc.,
If the authors notice that they are exceeding the page limit set by the committee, they must contact the Publications Chair for approval. The publications chair has the authority to approve one extra page. Authors have the option of buying at most two extra pages by paying Rs. 1000/- per page. Send the DD to Finance Chair; and make the draft payable to "VDAT Symposium (year as applicable)."
One or more of the authors must register as a participant and present the paper.
Papers that do not comply with these guidelines will not be included in the hardcopy proceedings.
Papers must be submitted in DOC
format using Microsoft Word
. No other formats are acceptable.
Do not include color photographs or graphics.
Figures must be of high resolution and must not have gray background.
Importing bitmap images in Microsoft Word will not be acceptable.
Authors must not use any material (figures and/or text) from the Internet or other sources without acknowledgement.
The authors must output hardcopy of their manuscript and ensure that all the figures are legible and also output PDF to verify the figures and tables show up before sending. PDF is used for the softcopy.
Please visit for details on Page formatting DOC & PPT foils, and download template file.
July 7-9, 2011
Wipro Technologies, Phase 1, Plot No 2, MIDC
Rajiv Gandhi Infotech Park, Hinjewadi, Pune 411057, India
Advance Program PDF 760KB
Tutorials 7 July
Full-day tutorials on July 7, 2011 and the Symposium during July 8-9, 2011 require separate registration. Please refer to related details.
Registrations are now open
Paper submission: Mar 2, 2011
Tutorial submission: Mar 2, 2011
Notification of acceptance: May 10, 2011
Camera-ready submission: June 1, 2011
Presentation submission: June 7, 2011
Symposium Dates: July 7-9, 2011
Full-day Tutorials: July 7, 2011
Conference: July 8-9, 2011
Analog, Architecture, Devices, FPGA, Low-power, Memory, Nanotechnology, Physical Design, Verification, Research Scholars' Forum
VLSI Society of India
Texas Instruments India
In cooperation with
IEEE Pune Section
July 7: Full-day Tutorials
Tutorial – T1 Analog & RF Design
T1-A Fundamentals & Design of Phase-Locked Loops (PLLs)
Dipankar Nagchoudhuri, Subhajit Sen, and Chetan Parikh (DAIICT, Gandhinagar)
T1-B Future directions in IC technology for RF communication: Challenges and Opportunities
Rajnish Sharma (CIET, Chandigarh)
Tutorial – T2 Automotive SoC
T2-A Challenges in the Physical Implementation of Automotive SoC's in RFCMOS65
Madhu Kiran, and Christian Joseph (NXP Semiconductors)
T2-B Challenges in Automotive Chip Testing for Power Consumption & Analog-Mixed Signal Tests Janardhan E, Venkatesh S S, and Saurabh Patodia (NXP Semiconductors India Pvt. Ltd)
Tutorial – T3 VLSI Design & Test
An Overview of Modern-day VLSI Design & Test Practices
C.P. Ravikumar (Texas Instruments India)
July 8 - 9: Symposium
Technical papers; Invited and Keynote talks; Embedded Tutorials; Panel discussion; VSI Meeting;
Research Scholars' Forum
Keynote talk-1: July 8
Embedded Microcontroller Solutions for Automobile Safety
Hoiman Low (Texas Instruments)
Keynote talk-2: July 8
Convergence of Bio-Nano-Information Technologies in the Nanoelectronics Era
V.Ramgopal Rao (IIT Bombay)
Keynote talk-3: July 9
Automotive Electronics Innovation Driven by Global trends and Challenges for Society
Carol de Vries (NXP Semiconductors)
Wireless System Design and System Engineering Challenges
Muralidhar Bandi; Kameswara Rao B; Ajith Kumar V K; and B. Ravi Kishore (HCL Technologies)
Integrated Chip Quality For Automotive Applications
Raghavendra Dattatraya; Jagadeesh Nallagatla; and Poornima Prahlada (NXP Semiconductors)
Design and Verification with SystemC
Bhanu Kapoor (Mimasic), Prapanna Tiwari (Synopsys), Shireesh Verma (Conexant), and Rahul Joshi
(Chip Design Pvt. Ltd., Gurgaon)
Panel discussion: VLSI Education in India: What is the next step?
Moderator: Prof. Vishwani D. Agrawal (Auburn University)
Panelists: Dipankar Nagchoudhuri (DAIICT, Gandhinagar), Rajnish Sharma (CIET, Chandigarh), N.S. Murty (NXP Semiconductors), and Niranjan Pol (LSI)
Research Scholars' Forum