Accepted papers PDF 38KB Download Advance Program PDF 760 KB
Embedded Tutorials
Paper ID 34	Embedded Tutorial (40 min)
Layered Testbench Framework for Verification Praveen Kumar* (Intel Mobile Communications)
Paper ID 108	Embedded Tutorial (40 min)
Architectural Power Management for Battery Lifetime Optimization in Portable Systems Manish Kulkarni; and Vishwani Agrawal* (Auburn University)
Regular Papers
Paper ID 1	Regular Paper (30 min)
VLSI Architecture and FPGA Implementation of Image Enhancement Algorithms Hitendra Gupta* (LNMIIT); Kamlesh Sharma (MNIT); and Shiv Joshi (IIT Delhi)
Paper ID 2	Regular Paper (30 min)
A Low Glitch Current Switch with Reduced Swing and its Application to PLL Charge Pump Subhajit Sen* (DAIICT, Gandhinagar); and Amir Hadji-Abdolhamid (Broadcom, Irvine, USA)
Paper ID 3	Regular Paper (30 min)
Critical Charge Model for Novel Radiation Tolerant Flip-Flop Surendra Rathod*; A Saxena; and S Dasgupta (IIT Roorkee)
Paper ID 17	Regular Paper (30 min)
A Design of Experiment based Approach to Variance Optimal Design of Analog Circuits Arnab Khawas*; Siddhartha Mukhopadhyay (IIT Kharagpur); and Amitava Banerjee (National Semiconductor)
Paper ID 19	Regular Paper (30 min)
Low Voltage Constant Hysteresis Schmitt Triggers Jayarama Ubaradka* (NXP Semiconductors)
Paper ID 40	Regular Paper (30 min)
Automating the Design of Successive Approximation Analog to Digital Converters Purushothaman A*; and Chetan Parikh (DAIICT, Gandhinagar)
Paper ID 44	Regular Paper (30 min)
Design and Analysis of Low Noise Amplifier for WiMAX application Suresh Naidu Lekkala*; and Bhuvan B (NIT Calicut)
Paper ID 46	Regular Paper (30 min)
Cluster based Routing for Multi pin droplets in Digital Microfluidic Biochips with Intelligent Collision Avoidance Pranab Roy*; Hafizur Rahaman (B.E.S.U, Shibpur); and Parthasarathi Dasgupta (I.I.M, Calcutta)
Paper ID 49	Regular Paper (30 min)
A Novel Fully Differential Folded Cascode Operational Transconductance Amplifier Kumaravel Sundaram*; Venkataramani Balasubramanian; Ajit Randhir; and Ramakrishna Chowtri (NIT Trichy)
Paper ID 58	Regular Paper (30 min)
Development of a Bird's eye view Parking Assistance System on a Programmable Multimedia Processor Bijo Thomas*; Yann Picard; Rajiv Chithambaran; and Cecile Cougnard (NXP Semiconductors)
Paper ID 63	Regular Paper (30 min)
A (1/5.5 x VDD) to (3/2 x VDD) Bidirectional I/O Buffer at 0.35µm, 3.3V CMOS Technology using Innovative Input Receiver Arnab Biswas*; and S Dasgupta (IIT Roorkee)
Paper ID 66	Regular Paper (30 min)
Inductive Degenerated Low noise Amplifier for Wireless Application in 0.18um UMC CMOS Kapil Soni*; and Rajendra Patrikar (VNIT, Nagpur)
Paper ID 73	Regular Paper (30 min)
Simulation of Low Voltage Flash Memory Cell Ashwini Shrirao*; Rashmi Gautam; and Rajendra Patrikar (VNIT, Nagpur)
Paper ID 78	Regular Paper (30 min)
Low Power High Throughput Differential Current Mode Signaling Technique for Global VLSI Interconnect Sujeet Kumar*; R.B. Deshmukh; and Rajendra Patrikar (VNIT, Nagpur)
Paper ID 86	Regular Paper (30 min)
Implementation of Embedded Resizing for MPEG-2 Decoder on Trimedia Dayananda KS*; and Milind Phadtare (NXP Semiconductors )
Paper ID 91	Regular Paper (30 min)
On-Chip Test Circuits for Throughput Measurement of High Speed Interconnects Amit Vishnani*; Marshnil Dave; Maryam Baghini; and Dinesh Sharma (IIT Bombay)
Paper ID 102	Regular Paper (30 min)
BER Analysis of Flip-Flop and Latches with Wire Pipelining Devendra Giri*; Gagnesh Kumar (NIT Hamirpur); and Diwakar Singh (Faculty)
Paper ID 105	Regular Paper (30 min)
Foolproof Methodology to Verify Clock stop in SoC Narendran Kumaragurunathan* (AMD)
Short Papers
Paper ID 4	Short Paper (20 min)
Tied-Gate DG-FinFET based Radiation Tolerant SRAM Cells Surendra Rathod*; A Saxena; and S Dasgupta (IIT Roorkee)
Paper ID 10	Short Paper (20 min)
3.3-V Signaling with 2.5-V Devices using Dynamic Biasing Jayarama Ubaradka*; and Dharmaray Nedalgi (NXP Semiconductors)
Paper ID 18	Short Paper (20 min)
Optimized Flash Analog to Digital Converter using LCT Comparator Meghana Kulkarni* (K.L.S. G.I.T. Belgaum); V Sridhar (P.E.S. College of Engineering, Mandya, Karnataka); and G. Kulkarni (Jain College of Engineering, Belgaum, Karnataka)
Paper ID 38	Short Paper (20 min)
A 110-MHz rail-to-rail amplifier with double-gate MOSFETs Chetan Parikh* (DAIICT, Gandhinagar); and Amara Amara (ISEP, France)
Paper ID 45	Short Paper (20 min)
CATD: A Tool for Consistency Analysis of Timing Diagrams Moumita Das* (Meghnad Saha Institute of Tech); Ansuman Banerjee (Indian Statistical Institute, Kolkata); and Subhashis Majumder (Heritage Institute of Technology)
Paper ID 52	Short Paper (20 min)
Design and Implementation of Differential Serial Interconnect using Wave pipelining and Surfing Bhaskar Manickam*; Parthiban Dhanapal; and Venkataramani Balasubramanian (NIT Trichy)
Paper ID 53	Short Paper (20 min)
Halo Implant Photoresist Mask layer Shadow effect on Leakage in 65nm SRAM Cell Srinivasaiah H. C. (Dayananda Sagar College of Engg)
Paper ID 70	Short Paper (20 min)
Performance Analysis of Carbon Nanotube Interconnects Tafseer Alam*; Rohit Dhiman; and Rajeevan Chandel (NIT Hamirpur)
Paper ID 74	Short Paper (20 min)
Simulation of 22nm n-Metal Oxide Semiconductor Field Effect Transistor Madhuri Borkar*; Rashmi Gautam; and Rajendra Patrikar (VNIT, Nagpur)
Paper ID 88	Short Paper (20 min)
Optimisation of Lateral Silicon Nanowire based Solar Cell using 3D TCAD Simulation Jitendra Kumar; Sanjeev Manhas* (IIT Roorkee); Brijesh Kaushik (Faculty); A Saxena; and Dharmendra Singh (IIT Roorke)
Paper ID 96	Short Paper (20 min)
Self Times System Design Using FIFO Mansi Jhamb* (USIT, GGSIPU); Vinod Khera (GTBIT); R Sharma; and A Gupta (NIT KKR)
Paper ID 100	Short Paper (20 min)
A Method to Reduce Switch-On Delay in Miller Based Slew Rate Controlled IO Dharmaray Nedalgi; and Kiran Gopal* (NXP Semiconductors)
Short Tutorials
Paper ID 39	Short Tutorial (60 min)
Wireless System Design and System Engineering Challenges Muralidhar Bandi; Kameswara Rao B; Ajith Kumar V K; and B. Ravi Kishore* (HCL Technologies)
Paper ID 61	Short Tutorial (60 min)
Integrated Chip Quality For Automotive Applications Raghavendra Dattatraya*; Jagadeesh Nallagatla; and Poornima Prahlada (NXP Semiconductors)
Paper ID 95	Short Tutorial (60 min)
Design and Verification with SystemC Bhanu Kapoor (Mimasic), Prapanna Tiwari (Synopsys), Shireesh Verma (Conexant), and Rahul Joshi (Chip Design Pvt. Ltd., Gurgaon)