12^th IEEE VLSI Design And Test Symposium

Organized by

VLSI Society of India

Industry Sponsors

Download Technical Program (PDF 400 KB)
Invited and Keynote talks

Any one interested in VLSI and related fields can register to attend VDAT Symposium. Registration details and tariff are shown below. Please Register Online and also send the filled-hardcopy of the Registration form (PDF 35KB) to the VDAT2008 Finance chair:

Mr. S.R.Gopal Naidu

Treasurer, VLSI Society of India

Finance Department

Texas Instruments (India) Pvt Ltd

Bagmane Tech Park, C.V. Raman Nagar

Bangalore 560093

Phone: 080 - 2509 9363; FAX: 2509 9717

vsiaccounts@vlsi-india.org

VDAT consists of full-day tutorials on Day-1 (July 23, 2008) , and the Symposium with technical paper presentation, keynote talks, panel discussion during July 24-26, 2008. Both need separate registration. Please refer tutorial details and mention the tutorial you wish to attend.

Indian participants to pay through a Demand Draft (DD) made out to VDAT Symposium 2008, payable at Bangalore. On the rear-side of DD, please write your name. If a Fellowship applicant, please mention Fellow/ Fellowship number. Foreign participants can pay through an International Money Order made out to VDAT Symposium 2008, payable at Bangalore, India, with bank charges if any added.

When an Author of a selected paper/s is also a Fellow receipient, please mention the fellowship number.

Author of a selected paper/s: At least one author from each selected paper must register before the deadline. If the same author is to present more than one selected paper, a separate registration for each is required. All registered authors must attend to present their papers. Those not abiding will not be entertained subsequently.

Fellow: Fellowship recipients must register by paying the full amount under the Fellow category before the deadline. In case a fellowship is not awarded, the balance payable under Student/ Faculty range must be sent separately, after the fellow list is announced. Please do not pay in excess. No refund will be made for over payment if any, and will be adjusted towards attending forthcoming VSI events for the current year, or VSI Membership, or purchase of previous VDAT/ VSI Proceedings, or towards accommodation (when applicable) etc.,

Student/ Faculty: For Indian Students and Faculty members. One should be a Student for the current year if applying, and must attach College credentials along with the payment.

Please also refer details under tutorials

 Tutorial-1: RF Design and Test (T1)
RFIC Design and Testing for Wireless Communications
Speakers: Vishwani Agrawal and Foster Dai, (Auburn University)

 Tutorial-2: Low Power Design (T2)
Part 1 - 4 hours
SoC Power Management Architecture Design and Verification
Speakers: Dr.Bhanu Kapoor, Mimasic; Shankar Hemmady, Synopsys; and Sandeep Aggarwal, TI India
Ultra Low-Power Processors for Embedded Systems
Speaker: Atul Lele (Texas Instruments) and Gurjit Singh Gill (Gill Instruments)

 Tutorial-3: Design Verification Methodologies (T3)
Holistic Verification: Myth or The Magic Bullet?
Speaker: Pradip Thaker, Analog Devices

Foundations of Design Verification- Formal and Functional Approaches
Speakers: Ansuman Banerjee; Kausik Datta; and Amit Roy (Interra Systems India Pvt. Ltd.)

Design Verification using Static Checker and Verification of Clock-domain Crossing
Speaker: Kaushik De, Synopsys